Thermal and mechanical stresses on silicon substrates may lead to operational or mechanical failures of devices constructed using those silicon substrates. Typical stresses include mechanical loading due to the packaging of the devices, thermal loading due to heat generated by circuits within those devices through power dissipation, and stresses applied to materials in close proximity to the devices. These stresses may lead to mechanical failure of the devices and/or mechanical failure of the material in close proximity to the devices. The larger the stress, the higher the chance for mechanical and/or circuit failure.
Typically, to be able to determine the stress imposed on a silicon substrate at a given location, two differential pairs of transistors are formed at that location. In order to determine the magnitude stress in two dimensions, it is necessary to (i) measure individual current flows through the two pairs of transistors and (ii) compare the measured current flows in each pair against values previously determined when exerting known stresses on the substrate. The comparison of the current flows and the previously determined values may be done by a stress computer.
Each pair of transistors is oriented so that pathways defined by their individual majority current flows across their respective channel regions are nonparallel. Ideally, the current flows associated with the two transistors define pathways that form a right angle. Further, in an ideal stress measurement system, it is desired that the right angle axes for the first pair of transistors be oriented 45 degrees off angle from the right angle axes for the second pair of transistors. Thus, for example, an x-axis associated with the first pair of transistors is ideally rotated 45 degrees from the x-axis associated with the second pair of transistors. This makes the y-axis for the first pair offset from the y-axis of the second pair, assuming both pairs of axes are right angles.
Manhattan geometry rules are often used when transistors are designed. Those rules require that the edges of various transistor building blocks making up the transistors be parallel to one of either the X or the Y axis of a coordinate system associated with the silicon substrate on which the transistors are formed. Such building blocks include the source and drain diffusion regions and terminal areas, the gate polysilicon region, the channel region, the oxide between the gate and the channel region, etc.
FIG. 1 is a block diagram of a prior art metal oxide silicon transistor. Transistor 102 is formed on substrate 104 and includes diffusion regions 106 and 108. Diffusion regions 106 and 108 each have respective silicide layers (not shown) which lowers the resistance of associated diffusion regions 106 and 108. Diffusion regions 106 and 108 may be p-type regions, n-type regions, or similar type regions well known in the art. Those skilled in the art will appreciate in an n-type diffusion region, the density of electrons in the conduction band exceeds the density of holes in the valence band. Those skilled in the art will appreciate in a p-type diffusion region, the density of holes in the valence band exceeds the density of electrons in the conduction band. Polysilicon gate 110 is formed over a thin oxide layer 112 insulating it from channel 114.
Metal contacts (not shown) are typically bonded to diffusion regions 106 and 108 and to gate 110 in order to facilitate the application of voltages between the various component parts and thus operate the device. Typically, a voltage is applied between diffusion areas 106 and 108, with an adjustable control voltage being applied to gate 110. Current will flow through channel region 114 if the voltage on the gate contact is greater than a threshold voltage.
Because the diffusion regions 106 and 108 are generally of relatively uniform resistance, current carriers leave one diffusion anywhere along its length and pass through the channel region 114 into the other diffusion region, following a path of least resistance. Thus, the pathways followed by those current carriers is typically a straight line from the edge of one of the diffusion regions to the nearest point on the other diffusion region.
Persons of ordinary skill in the art readily recognize that such pathways are along one coordinate axis of the coordinate system used when laying out the circuitry to be disposed on the substrate. Such a current flow is termed “Manhattan” current flow because the current flow is along one of the coordinate axes.
In a stress measurement system, Manhattan geometry rules may be used to produce the first of two pairs of transistors. However, the second pair of transistors needs to have a current flow that is non-Manhattan (not along a coordinate axis). Thus, the second pair of transistors needs to have a current flow that is not parallel to a coordinate axis, thus typically requiring that the second pair of transistors be implemented using non-Manhattan rules.